Difference between revisions of "Programmable Logic portal"
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Programmable Logic portal | Programmable Logic portal | ||
universal programmable logic chip: | |||
* A low cost minimal number of gates FPGA with all digital functions. Drag and drop programming | |||
* hobby and prototype electronics | |||
* replace all "tin can" logic with one programmable part | |||
software: | |||
* lookup chip label or logic family. | |||
* program as a standard device by inputting chip label | |||
* extract current chip programming | |||
* extract data on chip like mfg date and number of times programmed | |||
* provide custom logic/outline creation | |||
* produce simulation capabilities (incl. fully virtual labs) | |||
sell a dedicated handheld programmer with touchscreen & on-display keyboard | |||
also available as an open-source cross-platform software | |||
hardware: | |||
most common package size & outline should be the same as most popular logic chips (i.e. a 14-pi din) | |||
niche app chips: | |||
* fe, develop an ultra small, ultra easy to program, ultra low power uP without crap like pipeline & branch prediction, etc and on the other hand include features such as an ultra large ultra fast cache memory | |||
* also develop niche chips like ultra wide SIMD chips & ultra fast math processors |
Latest revision as of 16:51, 5 June 2011
Programmable Logic portal
universal programmable logic chip:
- A low cost minimal number of gates FPGA with all digital functions. Drag and drop programming
- hobby and prototype electronics
- replace all "tin can" logic with one programmable part
software:
- lookup chip label or logic family.
- program as a standard device by inputting chip label
- extract current chip programming
- extract data on chip like mfg date and number of times programmed
- provide custom logic/outline creation
- produce simulation capabilities (incl. fully virtual labs)
sell a dedicated handheld programmer with touchscreen & on-display keyboard
also available as an open-source cross-platform software
hardware:
most common package size & outline should be the same as most popular logic chips (i.e. a 14-pi din)
niche app chips:
- fe, develop an ultra small, ultra easy to program, ultra low power uP without crap like pipeline & branch prediction, etc and on the other hand include features such as an ultra large ultra fast cache memory
- also develop niche chips like ultra wide SIMD chips & ultra fast math processors