Difference between revisions of "Schematic Capture programs"
(4 intermediate revisions by the same user not shown) | |||
Line 44: | Line 44: | ||
*[[Eagle (program)|Cadsoft EAGLE]] – Very capable mid-range Schematic Capture and PCB Layout software that has a free version. | *[[Eagle (program)|Cadsoft EAGLE]] – Very capable mid-range Schematic Capture and PCB Layout software that has a free version. | ||
*[[Kicad]] – open source schematic capture and PCB design software suite | *[[Kicad]] – open source schematic capture and PCB design software suite | ||
*[[TARGET 3001!]] – mid-range Schematic Capture software that has a free version. | *[[TARGET 3001!]] – mid-range Schematic Capture software that has a free version. | ||
*[[gEDA]] – open source schematic capture using [[gschem]], simulation, and PCB design software suite | *[[gEDA]] – open source schematic capture using [[gschem]], simulation, and PCB design software suite | ||
==Free and Open Source Software (FOSS)== | ==Free and Open Source Software (FOSS)== | ||
Line 56: | Line 54: | ||
| [http://www-asim.lip6.fr/recherche/alliance/ Alliance] || [[POSIX]] || [[GNU General Public License|GPL]] || || Alliance is a complete set of free [[Electronic design automation|CAD]] tools and portable libraries for [[Very-large-scale integration|VLSI]] design. | | [http://www-asim.lip6.fr/recherche/alliance/ Alliance] || [[POSIX]] || [[GNU General Public License|GPL]] || || Alliance is a complete set of free [[Electronic design automation|CAD]] tools and portable libraries for [[Very-large-scale integration|VLSI]] design. | ||
|- | |- | ||
|- | |- | ||
|- | |- | ||
|- | |- | ||
| [[Electric (software)|Electric]] || [[FreeBSD|*BSD]], [[Java (programming language)|Java]] || GPL || Yes || [[Very-large-scale integration|VLSI]] circuit design tool with connectivity at all levels. Can also be used for schematic entry and [[Printed circuit board|PCB]] design. | | [[Electric (software)|Electric]] || [[FreeBSD|*BSD]], [[Java (programming language)|Java]] || GPL || Yes || [[Very-large-scale integration|VLSI]] circuit design tool with connectivity at all levels. Can also be used for schematic entry and [[Printed circuit board|PCB]] design. | ||
Line 70: | Line 65: | ||
| [[gEDA]]|| [[FreeBSD|*BSD]], [[Mac OS X|Mac]], [[Linux]] || GPL || Yes || Suite of applications for schematic capture, PCB layout editing (with autorouting capability), Gerber viewing, analog circuit simulation, Verilog design, and GTK-based waveform viewing. | | [[gEDA]]|| [[FreeBSD|*BSD]], [[Mac OS X|Mac]], [[Linux]] || GPL || Yes || Suite of applications for schematic capture, PCB layout editing (with autorouting capability), Gerber viewing, analog circuit simulation, Verilog design, and GTK-based waveform viewing. | ||
|- | |- | ||
|- | |- | ||
| [https://www.banu.com/herb/ Herb] || [[POSIX]] [[GLib]] || GPL || || Herb is a complete set of CAD programs and libraries for the specification, design and validation of VLSI circuits. | | [https://www.banu.com/herb/ Herb] || [[POSIX]] [[GLib]] || GPL || || Herb is a complete set of CAD programs and libraries for the specification, design and validation of VLSI circuits. | ||
|- | |- | ||
|- | |- | ||
| [[Kicad]]|| [[Linux]], [[Microsoft Windows|w32]], [[Mac OS X|Mac]] || GPLv2 || Yes || Unlike other free software alternatives, Kicad provides for all design stages through the same interface: Schematic capture, PCB layout, Gerber generation/visualization, and library editing are all standard features. It also has a "3D view" feature for PCBs. | | [[Kicad]]|| [[Linux]], [[Microsoft Windows|w32]], [[Mac OS X|Mac]] || GPLv2 || Yes || Unlike other free software alternatives, Kicad provides for all design stages through the same interface: Schematic capture, PCB layout, Gerber generation/visualization, and library editing are all standard features. It also has a "3D view" feature for PCBs. | ||
Line 85: | Line 78: | ||
| [http://www.layouteditor.net LayoutEditor] || [[Linux]], [[Microsoft Windows|w32]], [[Mac OS X|Mac]] || GPL (Basic Version) / Commercial || - || A IC/MEMS layout editor. Features: all basic design functions, all angle elements, font generator, macros, boolean operations, design rule checker, netlists, LVS, full supported formats: Calma [[GDSII]], OASIS ([[Open Artwork System Interchange Standard]]), [[DXF]], CIF (Caltech Intermediate Form), imported formats: gerber, lasi, alliance | | [http://www.layouteditor.net LayoutEditor] || [[Linux]], [[Microsoft Windows|w32]], [[Mac OS X|Mac]] || GPL (Basic Version) / Commercial || - || A IC/MEMS layout editor. Features: all basic design functions, all angle elements, font generator, macros, boolean operations, design rule checker, netlists, LVS, full supported formats: Calma [[GDSII]], OASIS ([[Open Artwork System Interchange Standard]]), [[DXF]], CIF (Caltech Intermediate Form), imported formats: gerber, lasi, alliance | ||
|- | |- | ||
|- | |- | ||
| [http://www.myhdl.org MyHDL] || [[Linux]], [[Microsoft Windows|w32]], [[Mac OS X|Mac]] || [[GNU Lesser General Public License|LGPL]] || || An open source [[Python (programming language)|Python]] package for capturing and simulating hardware designs. Includes utilities for conversion to VHDL and Verilog. | | [http://www.myhdl.org MyHDL] || [[Linux]], [[Microsoft Windows|w32]], [[Mac OS X|Mac]] || [[GNU Lesser General Public License|LGPL]] || || An open source [[Python (programming language)|Python]] package for capturing and simulating hardware designs. Includes utilities for conversion to VHDL and Verilog. | ||
Line 95: | Line 87: | ||
| [[Oregano (software)|Oregano]]|| || GPL || no || schematic capture + spice simulation | | [[Oregano (software)|Oregano]]|| || GPL || no || schematic capture + spice simulation | ||
|- | |- | ||
|- | |- | ||
| [http://parallel.cc ParC]|| Posix || GPL || ||[[C++]] extensions for [[Electronic system level]] and [[parallel processing]]. ParC is a front-end to GNU C++ that adds the HDL constructs for multithreading, with a view to moving the support downstrean into the C++ compiler at a later date. ParC should replace SystemC and is a functional superset of the Verilogs and VHDL. | | [http://parallel.cc ParC]|| Posix || GPL || ||[[C++]] extensions for [[Electronic system level]] and [[parallel processing]]. ParC is a front-end to GNU C++ that adds the HDL constructs for multithreading, with a view to moving the support downstrean into the C++ compiler at a later date. ParC should replace SystemC and is a functional superset of the Verilogs and VHDL. | ||
Line 103: | Line 94: | ||
| [[Quite Universal Circuit Simulator]] || [[Linux]], [[Solaris (operating system)|Solaris]], [[Mac OS X|Mac]], [[NetBSD]], [[FreeBSD]], [[Microsoft Windows|w32]] || GPL || || [[Schematic capture]] + Verilog + VHDL + simulation | | [[Quite Universal Circuit Simulator]] || [[Linux]], [[Solaris (operating system)|Solaris]], [[Mac OS X|Mac]], [[NetBSD]], [[FreeBSD]], [[Microsoft Windows|w32]] || GPL || || [[Schematic capture]] + Verilog + VHDL + simulation | ||
|- | |- | ||
|- | |- | ||
|- | |- | ||
|- | |- | ||
|} | |} | ||
==Proprietary software== | ==Proprietary software== | ||
Latest revision as of 22:08, 13 July 2012
There is absolutely no standardization among different schematic capture / EDA programs. And, many are simply unusable for any serious work.
The difference between a proper schematic capture and a junk solution is you wasting time downloading one, and struggling to have it do what you want.
Among the features that were evaluated for are:
- Ability to export drawing to an image
- Free versions available
- Proper symbol drawings for semiconductor devices (although libraries can fix this)
- Actually made for schematic capture, and not generic drawing
The list:
- Eagle. Free for. Has export. Idiotic library symbols. You can add other libraries, but those are scattered on the internet. Popular among hobbyists.
- WorkBench MultiSim. No export (in version 8, version 11 untested). Lacks some needed library parts.
Zenit Suite KiCAD pcbartist_1_4 dipfree_en64 freepcb_1200_setup
Rejected:
open_sch_capt. alpha_0p16_open_sch_capt
Individual products
- Autotrax – EDA/DEX is a Windows XP/Vista/7 schematic capture / PCB design layout program with built in Spice simulator and 3D part and board visualization.
- DipTrace – mid-range Schematic Capture and PCB Layout software that has a free version.
- Edwinxp – Totally Integrated Schematic Capture, Simulation and PCB design software.
- Electronics Workbench – Schematic Capture, Simulation and PCB design software suite.
- Multisim – Schematic Capture and SPICE Simulation software.
- Cadsoft EAGLE – Very capable mid-range Schematic Capture and PCB Layout software that has a free version.
- Kicad – open source schematic capture and PCB design software suite
- TARGET 3001! – mid-range Schematic Capture software that has a free version.
- gEDA – open source schematic capture using gschem, simulation, and PCB design software suite
Free and Open Source Software (FOSS)
Name | Architecture | License | Autorouter | Comment |
---|---|---|---|---|
Alliance | POSIX | GPL | Alliance is a complete set of free CAD tools and portable libraries for VLSI design. | |
Electric | *BSD, Java | GPL | Yes | VLSI circuit design tool with connectivity at all levels. Can also be used for schematic entry and PCB design. |
FreePCB | w32 | GPL | Yes | A printed circuit board design program for Microsoft Windows. FreePCB allows for up to 16 copper layers, both metric and English units, and export of designs in Gerber format. Boards can be partially or fully autorouted with the FreeRouting autorouter by using the FpcROUTE Specctra DSN file translator. |
Fritzing | w32, Mac, Linux | GPL | Yes | Integrated tool for breadboard, schematic, and PCB design. Targeted at non-engineers (designers, artists, researchers, hobbyists) and users of microcontroller platforms such as Arduino. |
gEDA | *BSD, Mac, Linux | GPL | Yes | Suite of applications for schematic capture, PCB layout editing (with autorouting capability), Gerber viewing, analog circuit simulation, Verilog design, and GTK-based waveform viewing. |
Herb | POSIX GLib | GPL | Herb is a complete set of CAD programs and libraries for the specification, design and validation of VLSI circuits. | |
Kicad | Linux, w32, Mac | GPLv2 | Yes | Unlike other free software alternatives, Kicad provides for all design stages through the same interface: Schematic capture, PCB layout, Gerber generation/visualization, and library editing are all standard features. It also has a "3D view" feature for PCBs.
It is available for all three major operating systems, and features a large selection of component libraries. Migration tools (for transferring files from other EDA packages) are also provided. The file format is plain text, and is well documented, which is a useful feature for content management systems. |
KTechLab | Linux | GPL | n/a | KTechLab is a schematic capture and simulator. It is speciufically geared toward mixed signal simulation of analg components and small digital processors. |
KLayout | Linux, w32, Mac | GPL | - | KLayout is a GDSII and OASIS file viewer and editor (if started in edit mode). Optimized for handling large data volumes. Editor mode functions include booleans, sizing, copy & paste, clip, undo/redo. Overlay capabilities for more than one layout. Ruby scripting interface (layout generation, editing, layout database access). |
LayoutEditor | Linux, w32, Mac | GPL (Basic Version) / Commercial | - | A IC/MEMS layout editor. Features: all basic design functions, all angle elements, font generator, macros, boolean operations, design rule checker, netlists, LVS, full supported formats: Calma GDSII, OASIS (Open Artwork System Interchange Standard), DXF, CIF (Caltech Intermediate Form), imported formats: gerber, lasi, alliance |
MyHDL | Linux, w32, Mac | LGPL | An open source Python package for capturing and simulating hardware designs. Includes utilities for conversion to VHDL and Verilog. | |
Netlistviewer | w32 | GPL | no | Netlistviewer is a software which reads SPICE circuit description (*.cir file) and automatically generates schematics in graphical form. |
Open Schematic Capture | Java (programming language) | GPL | no | Open Schematic Capture is a schematic capture and net list tool intended for analog or mixed analog/digital IC design. |
Oregano | GPL | no | schematic capture + spice simulation | |
ParC | Posix | GPL | C++ extensions for Electronic system level and parallel processing. ParC is a front-end to GNU C++ that adds the HDL constructs for multithreading, with a view to moving the support downstrean into the C++ compiler at a later date. ParC should replace SystemC and is a functional superset of the Verilogs and VHDL. | |
QSCAD | TCL/TK, Linux, w32 | Artistic License | Schematic capture + PCB design. | |
Quite Universal Circuit Simulator | Linux, Solaris, Mac, NetBSD, FreeBSD, w32 | GPL | Schematic capture + Verilog + VHDL + simulation |