Buck Voltage Regulator Evaluation Project

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Abstract: This project demonstrates design and testing of a DC-DC Buck Topology, Synchronous Rectification Voltage Regulator. Emphasis of regulator design is on low output ripple, high efficiency, and high reliability. These requirements would be ideal for a Solar Panel Array or a Rechargeable Battery (secondary storage) Array.

Initial design stage used Texas Instruments Webench online design tool, and a TI Evaluation Board.

Project requirements were 48VDC in, 12VDC at 10A out.


Contents

Disclaimer

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AUTHOR CONTACT INFORMATION:

ADMINISTRATOR,

Mkrdwiki (talk)

Listing of Acronyms

BOM – Bill of Materials

DC – Direct Current

DCR – DC Resistance (Inductor)

ESR – Equivalent Series Resistance

FN – Flat, No leads device package

IC – Integrated Circuit

LDO – Low-Dropout Regulator

MOSFET – Metal Oxide Semiconductor Field Effect Transistor

PCB – Printed Circuit Board

PMIC – Power Management Integrated Circuit

PUT – Power-Up Test

RMS – Root Mean Square

SMD – Surface Mount Design, Surface Mount Device

TI – Texas Instruments

UVLO – Under-Voltage Lock-Out

Project Design Requirements

The objective of this Project is to design, construct, and test a DC-DC voltage regulator with buck topology and synchronous rectification (“Voltage Regulator”).

Input to Voltage Regulator shall be a nominally 48V input.

Output from Voltage Regulator shall be a nominal 12V.

Output current capability of Voltage Regulator (constant-ON operation) shall be 10A.

Voltage Regulator shall current limit maximum output to 15A. Voltage regulator shall tolerate permanent short circuit condition at its output, and may either maintain a 15A output current, or enter a shutdown after a period of time of short-current condition.

Voltage regulator shall tolerate input voltage variation of ±10%.

Output voltage regulation shall be ±1% at 50% load.

Output ripple shall be less than 100mV.

Voltage Regulator shall not draw excessive ripple current from its input.

Voltage Regulator shall be a high-reliability design to protect the input from damage (e.g. from a short circuit within the Voltage Regulator).

Voltage Regulator shall be a long-life design, to last for the life of e.g. Solar Panel Array (10 years effective life).

Voltage Regulator output accuracy and precision will be limited by issues discussed in Buck Voltage Regulator Evaluation Project#Tolerance Stacking.

Project Design

System Level Design

Expected inputs to this Regulator e.g. solar panels and rechargeable batteries produce an output voltage which varies with the amount of incident solar radiation or chemical charge remaining. Therefore, the Voltage Regulator shall [Requirement] be able to provide a constant output voltage with varying input voltage (voltage regulation). Given the complexity of switching-mode operation, voltage regulation, and synchronous rectification, a controller IC will be used in this project.


Given the high output current requirement (10A), and the subject matter of the Project, discrete power MOSFETs shall be used as circuit switching and rectification elements.


As this was a time-sensitive Project, Texas Instruments (TI) Webench passive part calculations, choices, and BOM will be used along with a pre-made Printed Circuit Board (PCB). This choice will make it easy for hobbyists, tinkerers, DIY'ers, and students to follow material of this article.


Project shall demonstrate:

  • Knowledge of DC-DC regulator design
  • Circuit operation
  • Functionality of Power Electronics components of circuit
  • Ability of author and reader to test DC-DC regulator for proper operation


For the purposes of project evaluation, circuit shall be supplied by a 48VDC regulated power supply, and output shall be loaded with a resistive load or an active load (bank of MOSFETs).


Conformal coating shall be used to avoid electric shock to human operator, and to prevent damage due to moisture.

System Level Diagram

Figure 5.1: System Level Diagram is a System Level Diagram of the Voltage Regulator.


Figure 5.1: System Level Diagram

Design Aids

Online Design Tool

Texas Instruments has a Webench Online Design Tool. Chosen IC controller (see Buck Voltage Regulator Evaluation Project#Integrated Circuit (IC) Controller) is covered by Webench. Webench will be used to derive most of necessary circuit components calculations. Then, critical components (MOSFETs, inductor, output filtering capacitor) values will be verified by hand. Webench-suggested components and PCB will be purchased. Received parts will be soldered onto the PCB. The design will then be tested.

Schematic

Webench has produced the following schematic (Figure 5.2: Webench Schematic) for requirements of 48Vin, 12Vout, 10Aout, LM5116:


Figure 5.2: Webench Schematic

Circuit Features

The LM5116 controller has the following built-in features:

  • Current Mode Control (Emulated Current Ramp), Emulated Peak Current Mode
  • Wide Operating Range Up to 100V
  • Variable Frequency (50 kHz to 1 MHz)
  • Shutdown / Enable Input
  • Settable Output from 1.215V to 80V
  • Programmable Current Limit
  • Programmable Soft-Start
  • Programmable Line Under-Voltage lockout
  • Thermal Shutdown
  • Adaptive Dead-time Control

Planned Project Timeline

Planned Project Timeline is outlined below:

  1. Project Specification
  2. Selection of IC controller
  3. Webench Design
  4. Purchasing of Webench recommended components and PCB
  5. PCB Assembly
  6. Regulator Testing
  7. Justification of all Webench Calculations, per component datasheets
  8. Re-Design Suggestions

Applicable Industry Standards

Below is a listing of Table 6.1: Project Applicable Industry Standards:


Standard
Title
Remarks
J-STD-001
Requirements for Soldered Electrical and Electronic Assemblies
Applies to project hand-assembled board
IPC-A-600
Acceptability of Printed Boards
Applies to project hand-assembled board
IPC-A-610
Acceptability of Electronic Assemblies
Applies to project hand-assembled board
IPC-7711/7721
Rework, Repair and Modification of Electronic Assemblies
Applies to project hand-assembled board

Table 6.1: Project Applicable Industry Standards




Detailed Design

First design iteration will use component values suggested by TI Webench because speed of placement of shipment was critical to success of this project.


Webench has optimized between size, cost, and weight of components (slow switching frequency) and power loss (dissipation) (high switching frequency) for a frequency of ~100kHz.


Project design is for a maximum of 100mV output voltage ripple.


After an order was placed for Webench suggested components and PCB, calculations below were made to qualify design for target application. Any issues found with Webench design, and any areas for improvement will be documented in a later section (9 Design Improvements).


Individual Mechanical Components Choices

MOSFET heatsinks

PCB uses thermal via technology to dissipate heat from device into the PCB plane. Due to low heat loss in active devices and use of thermal vias, heatsinks are not required.


Printed Circuit Board

This project uses a pre-designed and pre-built PCB. An online product listing PCB is shown in Figure 7.1: Online product listing PCB.


[[Image:|thumb|Figure 7.1: Online product listing PCB]]


Individual Electronic Components Choices

Unless otherwise specified, all electronic parts shall be Surface Mount Design (SMD) mounting technology.


Only the following major components choices will be described here in detail, leaving the rest to Webench and datasheet calculations:

  • IC Regulator
  • Active Switch MOSFET
  • Synchronous Rectifier MOSFET
  • Input Protection Fuse
  • Inductor
  • Input Filtering Capacitors
  • Output Filtering Capacitors

Duty Cycle

$ D=\frac{{V}_{\text{IN}}}{{V}_{\mathit{OUT}}}=\frac{12}{48}=0.25=25\text{\%} $
(7.1)

Output Voltage Ripple

The output ripple is determined by inductor ripple current and output capacitor capacitance and ESR.


Output voltage ripple due to inductor ripple can be found from:


$ {\mathit{\Delta V}}_{C}=\frac{{V}_{S}\ast D\ast \left(1-D\right)}{8\ast L\ast C\ast {f}^{2}}=\frac{48\ast 0.25\ast \left(1-0.25\right)}{8\ast 22\mathrm{\mu }\ast 560\mathrm{\mu }\ast 100{k}^{2}}=9\mathit{mV} $
(7.2)

Webench specified capacitor has an ESR rating of 14mΩ (TODO ADD). This ESR will cause a voltage fluctuation in the amount of


$ \mathrm{\Delta }{V}_{O\left(\mathit{ESR}\right)}=\mathrm{\Delta }{i}_{C}\ast {r}_{C}=4.09\ast 14m=57.26\mathit{mV} $
(7.3)

However, the experimentally measured value (see Output Voltage Ripple) was 760mV. Calculations do not agree to empirical data because ESR of Webench suggested electrolytic capacitor at switching frequency is not considered.

Tolerance Stacking

TODO ADD

Integrated Circuit (IC) Controller

A Digi-Key (http://www.Digi-Key.com/) search was performed for the “Product Index > Integrated Circuits (ICs) > PMIC - Voltage Regulators - DC DC Switching Controllers” category, as the Regulator, since a discrete external MOSFET's will be used.


Available IC's were narrowed down by the following criteria:

  • In Stock: Yes
  • Number of Outputs: 1
  • Topology: Buck Only
  • Voltage – Supply: >48V
  • Packaging: Not Digi-Reel
  • Package / Case: Not “FN” (flat, no leads)

The Surface Mount Device (SMD) Exposed Pad allows larger heat dissipation, but part is not removable using conventional manual soldering rework processes. As this is a time-sensitive project, and part removal and / or replacement is expected, Exposed Pad technology will not be utilized for this Project (pad will be left unsoldered).


FN (flat, no leads) package types has been rejected for same reasoning as above.


Further narrowing down to controllers which support synchronous rectification leaves devices by Linear Technology and Texas Instruments.


The only device remaining which is supported by TI Webench is the LM5116. Chosen part type:

Texas InstrumentsLM5116MHX/NOPBSMD


Inductor

At output current of 10A at 12V, output equivalent resistance is


$ R=\frac{V}{I}=\frac{12}{10}=1.2\mathrm{\Omega } $
(7.4)

Inductor critical value for continuous current operation can be found from


$ {L}_{\mathit{crit}}=\frac{\left(1-D\right)\ast R}{2\ast f}=\frac{\left(1-0.25\right)\ast 1.2}{2\ast 100k}=4.5\mathrm{\mu }H $
(7.5)

However, with this inductance value, ripple current thru inductor will be


$ {\mathit{\Delta I}}_{L}=\frac{{V}_{O}\ast \left({V}_{S}-{V}_{O}\right)}{f\ast L\ast {V}_{S}}=\frac{12\ast \left(48-12\right)}{100k\ast 4.5\mathrm{\mu }\ast 48}=20A $
(7.6)

Too large of a current for a reasonable inductor. Furthermore, this 20A ripple current will be passed to the output filtering capacitor CO, necessitating an unreasonably large capacitance and an unreasonably low ESR.


TI Webench uses a design choice of inductor ripple being 40% of output current, a much more reasonable value. Substituting


$ \mathrm{\Delta }{I}_{L}=0.4\ast {I}_{O}=0.4\ast 10=4A $
(7.7)

(7.7) into (7.6) results in L = 22.5μH.


When switching is active, current thru inductor goes up to a maximum of


$ {I}_{\mathit{Lmax}}={V}_{O}\ast \left\lbrack \frac{1}{R}+\frac{1-D}{2\ast L\ast f}\right\rbrack =12\ast \left\lbrack \frac{1}{1.2}+\frac{1-0.25}{2\ast 22\mathrm{\mu }\ast 100k}\right\rbrack =12.05A $
(7.8)

Inductor must be rated for this saturation current, or higher.


Inductor RMS current is:


$ {I}_{L},\mathit{RMS}=\sqrt{{I}_{L},{\mathit{avg}}^{2}+{\left\lbrack \left(\frac{\frac{\mathrm{\Delta }{i}_{L}}{2}}{\sqrt{\left(3\right)}}\right)\right\rbrack }^{2}}=\sqrt{{10}^{2}+{\left\lbrack \left(\frac{\frac{4.09}{2}}{\sqrt{\left(3\right)}}\right)\right\rbrack }^{2}}=10.07A $
(7.9)

where average inductor current is


$ {I}_{L},\mathit{avg}={I}_{O}={I}_{R\left(L\right)} $
(7.10)

Inductor wire must be rated for the RMS current. However, the lower inductor DCR is, the lower the losses will be in the circuit.


For L1 re-design, see 9.11 Inductor Re-Design.


Webench has chosen the following component:


Manufacturer
Part Number
Type
Inductance
IRMS
DCR
Saturation current
Coilcraft, Inc
SER2918H-223KL
Ferrite
22μH
20A
2.6mΩ
12.0A (-10%)

Table 7.1: Inductor, Webench


Input Protection Fuse

An inline fuse-holder and a fuse shall be used for protection of power supply feeding this circuit. Circuit current requirements at full output, the worst input voltage, and worst estimate of 80% efficiency will be (7.11):


$ \frac{\frac{\left(12\ast 10\right)}{48-0.1\ast 48}}{0.8}=3.47A $
(7.11)

A slow-blow fuse of 3.5A shall be used at circuit input due to Input Filtering Capacitors (7.2.8 Input Filtering Capacitors).


Output Filtering Capacitors

Project target is 100mV of ripple at rated current.


Required output capacitance can be found from:


$ {\mathit{\Delta V}}_{C}=\frac{{V}_{S}\ast D\ast \left(1-D\right)}{8\ast L\ast C\ast {f}^{2}} $
(7.12)

For ΔVC of 100mV, formula asks for CO=51.1μF. This does not agree with empirical data when ESR of practical capacitors at Regulator switching frequency is considered (see Output Voltage Ripple) of 760mV of ripple for 560μF of electrolytic output capacitance.


Webench has selected an SMD capacitor with specifications:


Manufacturer
Part Number
Type
Capacitance
Voltage Rating
ESR at fSW
Maximum ripple current
Panasonic Electronic Components
16SVPF560M
Polymer
560μF
16V
14mΩ
???

Table 7.2: Output Filtering Capacitor, Webench


It is standard industry practice to connect several capacitors in parallel to reduce equivalent ESR. If output capacitance or ESR is found inadequate, then supplemental capacitors will be connected in parallel.


The 16V capacitor voltage rating as suggested by Webench below industry standard safety margin of 1.5X and is too low. Future design iterations shall use 20-25V rated capacitors on the output.


Input Filtering Capacitors

TODO ADD

MOSFET Switch

TODO ADD

MOSFET Active Rectifier

TODO ADD


Diode D3 was installed in parallel with MOSFET M2 as supplemental protection to provide a conducting path for inductor current during the dead time when both MOSFETs are off. This diode supplements the MOSFET body diode. Diode type should be a Schottky, for improved switching. However, M2 has an exposed pad soldered to PCB thermal vias. D3 is a SMD device situated above the PCB and it is not in thermal contact with the PCB. Such design protects MOSFET M2 from over-voltage damage, but results in a hot diode D3. Future PCB design may use a larger diode or one with better dissipation into device terminations (and therefore the PCB).


TODO ADD Verify below:


$ {I}_{\mathit{AVG}}={I}_{O}\endash {I}_{\text{IN}}=10\endash 2.78=7.22A $
(7.13)
$ I\left(\mathit{peak}\right)={I}_{L}\left(\mathit{peak}\right)=12.05A $
(7.14)
$ {T}_{\mathit{ON}}={T}_{\mathit{total}}\ast D=\frac{1}{f}\ast D=\frac{1}{100k}\ast 0.25=2.5\mathrm{\mu }s $
(7.15)

MOSFET switching speed should be 1/10, or 0.25μs for low switching loss.

PCB Protection

Due to high voltage present, PCB shall have applied shielding to protect a human operator against shock. Conformal coating can shield against shock, and also protect PCB from moisture.


If used outdoors, PCB shall be placed in a shielded enclosure, and shall avoid direct incident sunlight.


Circuit Simulation

Simplified functional circuit simulation was performed with LTSPICE.


TODO ADD

Testing Methodology and Test Results

Test Measurements

The following measurements shall be obtained of circuit operation:


  • Operating frequency
  • Circuit duty cycle for full-load operation
  • Output voltage ripple
  • Waveforms for major circuit components
  • Gate control voltage for both MOSFETs
  • Circuit efficiency at full load
  • Turn-ON settling time (into full load)
  • No-load output voltage
  • Full-load output voltage
  • Output voltage for 25, 50% of load current
  • Minimum input voltage for ±0.5V output voltage regulation
  • Sense Resistor current waveform (representative of inductor current waveform)
  • Short-circuit behavior
  • Control loop voltage waveform

Transient Response Testing:

  • Momentary upset capability (output voltage drop by <1V)
  • Input voltage transient capability

In addition, a thermal infra-red image of PCB shall be obtained with circuit supplying full load current for 30 minutes with no forced airflow.


Test Requirements

Voltage Regulator shall PASS the following tests:


  • Operation with input voltage variation of ±10%, no load and full load
  • Output voltage ripple less than 50mV at full load
  • Output voltage regulation ≤1% from no load to full load
  • Short circuit test (output current shall limit itself to 15A)

Test Procedure

Table 8.1: Project Test Procedure below summarizes work which was performed to design, assemble, and test the Regulator.


Procedure Step
Results
Remarks
Obtain Project Requirements
Completed
Initial Design Stage
Completed
Sourcing
Completed
Received PCB & Parts Verification
Issues found with BOM
See Engineering Notebook
PCB Assembly
Completed
J-STD Class I Assembled PCB Inspection
Completed
Workmanship acceptable
Power-Up Test (PUT)
Completed
Voltage Regulator Testing
Completed
Re-design needed
Transient Testing
Test Equipment Not Available
Test Equipment Not Available
Re-Design, Re-Test
In Progress
Report Close-Out
Awaiting previous steps

Table 8.1: Project Test Procedure


PCB Assembly

Regulator PCB was assembled and soldered by hand to IPC J-STD Class I specifications. Results are shown below in Figure 8.1: Assembled PCB, Top and Figure 8.2: Assembled PCB, Bottom:


[[Image:|thumb|Figure 8.1: Assembled PCB, Top]]


[[Image:|thumb|Figure 8.2: Assembled PCB, Bottom]]


Rubber feet were added to bottom of PCB for high-voltage isolation, prevention of damage to PCB, and marginal heat dissipation improvement.


Test Results

Test Setup

Test setup, showing major test components used, is shown below in Figure 8.3: Test Setup:


[[Image:|thumb|Figure 8.3: Test Setup]]


Test Equipment Calibration Information

The following calibrated test equipment was used to obtain test measurements:


Make
Model
Equipment Type


Hewlett Packard
34401A
Bench-top DMM


Hewlett Packard
34401A
Bench-top DMM


Hewlett Packard
34401A
Bench-top DMM


Fluke
83V
Hand-held DMM


Tektronix
DPO4054
Oscilloscope, 500MHz


new DMM TODO ADD


Megger
DLRO 10X
Milliom-meter


Table 8.2: Equipment Calibration Information

Power-Up Testing (PUT)

The following procedure was used for safe Power-Up Testing of the Regulator:


A bench power supply was set to 24V with 0.1A limit. When Regulator was connected to this power supply, no output voltage was produced, and input current draw was 0.03A. This is due to the Under-Voltage Lock-Out (UVLO) feature of the circuit.


Power supply voltage was then slowly increased. Regulator turned ON (started to produce output voltage) at 37.5V. Input current draw was 0.05A (no Regulator load), and Regulator no-load output voltage was 12.07V.


To test no-load ±10% input voltage deviation, power supply was varied as shown below:


Power Supply Voltage, V
Regulator Output Voltage, V
Regulator Input Current Draw, A
48
12.07
0.05
52
12.07
0.07

Table 8.3: No-Load Input Voltage Variation


Regulator shows it can tolerate ±10% input voltage deviation, and also shows excellent output voltage no-load stability.


Intermediate load operation was tested next. Power supply was set to 48V, 3.1A current limit.


Regulator showed the following results when loaded with intermediate resistance values:


Load Resistance, Ω
Regulator Voltage Output, V
Regulator Current Output, A
5
12.06
2.275
2
12.05
5.224

Table 8.4: Intermediate Loads


Regulator is showing excellent output voltage stability at 50% load.


Circuit efficiency at 50% load was calculated below:


Voltage, V
Current, A
Power, W
Input
48.308
0.968
46.7621
Output
12.06
3.660
44.1396

Table 8.5: 50% Load Efficiency


Circuit efficiency can be calculated as follows:


$ \mathit{Efficiency}=1-\frac{{P}_{\text{IN}}-{P}_{\mathit{OUT}}}{{P}_{\text{IN}}}=1-\frac{46.7621-44.1396}{46.7621}=0.944=94.4\text{\%} $
(8.1)

A 5.61% fraction (2.623W) of input power was dissipated as heat inside the Regulator. Such amount of heat should not necessitate forced air or a heatsink for dissipation.


Full-Load Testing

A low-resistance, high dissipation rating variable resistor was used as a load for Full-Load Testing. At the output current of 9.94A, Regulator output was 11.999V. This shows excellent regulation of output voltage from “no load” to “full load” of:


$ \mathit{Regulation}=\frac{{V}_{O}\mathit{no}\mathit{load}-{V}_{O}\mathit{full}\mathit{load}}{{V}_{O}\mathit{no}\mathit{load}}=\frac{12.07-11.999}{11.999}=0.592\text{\%} $
(8.2)

Full-load efficiency was calculated from measurements below:


Voltage, V
Current, A
Power, W
Input
46.504
2.6780
124.538
Output
11.997
9.93
119.13

Table 8.6: Full-Load Efficiency


Circuit efficiency can be calculated as follows:


$ \mathit{Efficiency}=1-\frac{{P}_{\text{IN}}-{P}_{\mathit{OUT}}}{{P}_{\text{IN}}}=1-\frac{124.538-119.13}{124.538}=0.957=95.7\text{\%} $
(8.3)

A 4.34% fraction (5.408W) of input power was dissipated as heat inside the Regulator. Thermal infra-red images of Regulator have been taken (see Thermal Infra-Red Imaging Of Full-Load Operation) to judge whether heat dissipation is adequate to keep highest component temperatures low.


Operation with input voltage variation of ±10%, full load

The following set of measurements were obtained for input voltage variation while supplying full load current:


VIN Deviation
VIN
IIN
VOUT
IOUT
+10%
51.86
2.41
12.000
9.95
–10%
42.52
2.92
12.000
9.95

Table 8.7: Input Voltage Variation, at Full Load


No VOUT deviation was measured with variation of input voltage over ±10%.


Thermal Infra-Red Imaging Of Full-Load Operation

By calculation, at full-load, Regulator is dissipating 5.408W. Since Regulator has no forced-air or heatsink cooling, thermal infra-red imaging was performed. Length of time Regulator was ON before imaging was 2 minutes due to load allowable dissipation limitation. A future measurement should be taken after a long time (30 minutes) of operation with no airflow.


Thermal IR photos were taken as shown below in Figure 8.4: Thermal IR Image, Full Load, 2 minutes of operation:


[[Image:|thumb|Figure 8.4: Thermal IR Image, Full Load, 2 minutes of operation]]


For a 2 minute operation, the hottest component was D3 at about 75°C.


Diode D3 was installed in parallel with MOSFET M2 as supplemental protection to provide a conducting path for inductor current during the dead time when both MOSFETs are off. This diode supplements the MOSFET body diode. However, M2 has an exposed pad soldered to PCB thermal vias. D3 is a SMD device situated above the PCB and it is not in thermal contact with the PCB. Such design protects MOSFET M2 from over-voltage damage, but results in a hot diode D3. Future PCB design may use a larger diode or one with better dissipation into device terminations (and therefore the PCB).


Other major circuit components are prominent in thermal imaging.

Output Voltage Ripple

Measurement of Regulator output shows ripple and transients of various frequencies (Figure 8.5: Regulator Output Voltage Ripple and Transients):


[[Image:|thumb|Figure 8.5: Regulator Output Voltage Ripple and Transients]]


Output voltage ripple is exceeding 500mV (Figure 8.6: Output Voltage Ripple):


[[Image:|thumb|Figure 8.6: Output Voltage Ripple]]


Periodic waveforms are observed with frequencies of 104kHz and 208kHz.


In addition, there are transients (voltage spikes) present (Figure 8.7: Output Voltage Transients):


[[Image:|thumb|Figure 8.7: Output Voltage Transients]]


These transients consist of very fast ringing (Figure 8.8: Output Ringing) extending into the MHz range:


[[Image:|thumb|Figure 8.8: Output Ringing]]


The magnitude and frequency of output transients and ringing, as well as magnitude of ripple, are unacceptable. TI Webench design does not use extensive output decoupling specified in controller IC datasheet, most likely to keep costs and size of the PCB down. Reduction of output ripple and transients will require addition of several output decoupling capacitors of different capacitances and materials, added in parallel, as it is standard industry practice. Current PCB does not allocate nearly enough space for the additional capacitors.


See 9.5 Output Capacitance for improved test results.


Gate Control Voltage for Both MOSFETs

Oscilloscope measurement (Figure 8.9: M2 Gate Control Voltage) shows gate control voltage magnitude for M2 MOSFET is 7.2V. This is sufficient voltage to turn ON Logic Level Gate MOSFETs, but may be insufficient to turn ON “standard” control voltage MOSFETs.


[[Image:|thumb|Figure 8.9: M2 Gate Control Voltage]]


Since MOSFET M1 is a NMOS, high-side switching is required as gate control voltage must exceed Regulator input voltage. This higher voltage is obtained inside the controller IC with a bootstrap voltage. Figure 8.10: M1 Gate Control Voltage shows a gate control voltage 56–48=8V higher than power supply. A fast switching waveform is seen, indicating that controller IC is able to supply enough current to charge and discharge MOSFET input capacitance quickly. However, a bootstrap supply cannot provide static (steady) voltage, which is evident by gate voltage droop.

[[Image:|thumb|Figure 8.10: M1 Gate Control Voltage]]


A certain amount of dead time is required to avoid shoot-thru. Figure 8.11: MOSFETs Dead Time shows about 104ns of dead time.


[[Image:|thumb|Figure 8.11: MOSFETs Dead Time]]


At full load, oscilloscope measurements were taken (Figure 8.12: Full Load Duty Cycle - ON Time and Figure 8.13: Full Load Duty Cycle - Total Time) to obtain Regulator duty cycle information.


[[Image:|thumb|Figure 8.12: Full Load Duty Cycle - ON Time]]


[[Image:|thumb|Figure 8.13: Full Load Duty Cycle - Total Time]]


Duty cycle percentage can now be found:


$ D=\frac{\mathit{ON}\mathit{Time}}{\mathit{Total}\mathit{Time}}=\frac{2.44\mathrm{\mu }s}{9.56\mathrm{\mu }s}=0.255=25.5\text{\%} $
(8.4)

Regulator switching frequency can now be found


$ f=\frac{1}{\mathit{cycle}\mathit{time}}=\frac{1}{9.56\mathrm{\mu }s}=105\mathit{kHz} $
(8.5)

Turn-ON Settling Time (into full load)

As shown below in Figure 8.14: Power Supply Settling Time, power supply takes about 12ms to reach 38 volts.


[[Image:|thumb|Figure 8.14: Power Supply Settling Time]]


Once UVLO is exceeded, Regulator takes about 1.2ms to settle to regulated output (Figure 8.15: Voltage Regulator Output Settling Time):


[[Image:|thumb|Figure 8.15: Voltage Regulator Output Settling Time]]


Minimum input voltage

Regulator minimum voltage is limited by UVLO activation at 35V. Output voltage is ±0.01V from VIN=48V down to UVLO level.


Inductor Voltage Waveform

Inductor Voltage Waveform is shown below:


[[Image:|thumb|Figure 8.16: Inductor Voltage Waveform]]


For a representative inductor current waveform, see 8.5.13 Sense Resistor Current Waveform.


Transient Response Testing

Testing to be performed:

  • Momentary upset capability (output voltage drop by <1V)
  • Input voltage transient capability

Author has no capability at this time to perform Transient Response Testing.


Sense Resistor Current Waveform

Sense resistor current waveform is representative of inductor current waveform, as direct measurement of current in series with inductor may be difficult and / or affect circuit operation.


[[Image:|thumb|Figure 8.17: Sense Resistor Current Waveform]]


Rsense was measured to be 5.422mΩ, but due to test lead limitations, measurements were made 5mm from each resistor lead. Assuming Rsense is 5mΩ as rated, ripple current thru inductor TODO ADD

Current Overload / Short-Circuit Behavior

To test current overload behavior, a load resistor of 499.1mΩ (excluding test leads resistance) was placed at output. VIN = 48V. A current output of 13.24 to 13.6 was obtained.


Since this was below 15A limiting requirement, a “dead short” was created by connecting test leads together, without any series resistance. An output current of 25.8A was obtained, with an output voltage no longer compliant to 12V. This was more current than was expected.


On investigation of datasheet [1] page 17 equation


$ {I}_{\mathit{PEAK}\left(\mathit{LIMIT}\right)}=1.1-\frac{\frac{25\mathrm{\mu }\ast {t}_{\mathit{ON}}}{{C}_{\mathit{RAMP}}}}{{A}_{\mathit{SENSE}}x{R}_{\mathit{SENSE}}}=1.1-\frac{\frac{25\mathrm{\mu }\ast \left(0.25\ast \frac{1}{100k}\right)}{1.5n}}{10\ast 5m}=21.17A $
(8.6)

Since desired short current limit is 15A, re-design requires a 7mΩ, physically wider sense resistor (see 9.10 Sense Resistor Re-Design).


Control Loop Voltage Waveform

DC-coupled measurement of control loop voltage is shown below:


[[Image:|thumb|Figure 8.18: Control Loop Voltage, DC-Coupled]]


Same, but AC-coupled to show detail is shown below:

[[Image:|thumb|Figure 8.19: Control Loop Voltage, AC-Coupled]]




Design Improvements

TI Webench designs seems to be targeted for low cost. Parts specified are not adequate for the requirements, and are not in line with datasheet recommendations. Test data shows inadequate capabilities of the circuit.


The following are the most obvious shortcomings of the design, and areas for improvement:


TODO ADD


IC Controller improvements

The following is a list of improvements which can be made to the IC Controller and direct supporting circuitry:


Power Supply

IC requires an internal regulated voltage source of 7.4 volts. IC is capable of using an internal linear voltage regulator. However, linear voltage regulators are lossy, and as a rough estimate the IC will have to generate and dissipate up to an amount of power of:


$ {P}_{D\left(\mathit{LDO}\right)}=\left({V}_{O}-{V}_{\mathit{REG}}\right)\ast {I}_{\mathit{IC}}=\left(48-7.4\right)\ast 26m=1W $
(9.1)

Datasheet specifies a typical VCC Sourcing Current Limit of 26mA.


IC is also capable of instead being powered off of its own output voltage of 12V (as long as datasheet parameters and guidelines are met). This will both improve efficiency and reduce amount of heat generated by the IC.


A “jumper” wire was added from the VCCX post to VOUT.


TODO ADD Thermal image of 30-min operation after change.

Voltage Rail Protection

A pin of the IC controller is connected directly to the high-voltage, high-current voltage rail. If a short-circuit condition developed inside the IC, resulting current may be not large enough to melt the Input Protection Fuse, but may be enough to damage IC controller and / or nearby electronic components. A fuse in series with IC supply input should be used for a high-reliability design. Its current rating depends on the maximum current which can be carried by IC substrate and bond wires. An exact rating is not given, but a value of 100mA seems reasonable from datasheet interpretation. Fuse type should be fast blow.


Snubber

According to [2, pg. 441], “Snubber circuits reduce power losses in a transistor during switching ... and protect the device from the switching stresses of high voltages and currents.”


Output voltage shows ringing of 150MHz and an amplitude of 700mV (see 9.5 Output Capacitance). This is the highest magnitude of transients remaining at output, and this energy should be removed from output.


Usual methods to prevent this energy from reaching switching device and circuit load is to use an absorbing snubber (series connection of capacitor and resistor) to common, in order to absorb and dissipate high-frequency transients in the resistor. This method requires an appropriately-sized (power) resistor, and will result in losses, as well as increase of PCB temperature.


An “energy recovery snubber” may be used to re-circulate captured energy to circuit input instead of merely dissipating that energy as heat, but at the expense of greater circuit complexity and potential for erroneous design and circuit failure. This subject is beyond the scope of this report.

Free-Wheeling Diode

This diode supplements synchronous rectification MOSFET during dead time(s) (see 8.5.8 Gate Control Voltage for Both MOSFETs) twice during each switch period. MOSFET body diode has VF=500mV, while a Schottky diode type has VF=300mV. A purpose-built diode for this application can be more ruggedized (avalanche rating, switching speed, etc).


Diode should have the following characteristics:

  • Schottky type.
  • IF needs to be equal to IL(MAX) or higher.
  • PD rating needs to factor in temperature rise due to amount of current passed thru the diode during two times of conduction in each switch cycle, and Θ.

Input capacitance

Current shorts (“short circuit”) internal to an input capacitor which is placed between a high-voltage, high-current input voltage and common pose a risk of damage to the PCB, nearby electronic components, and solar panel powering the Regulator. An input protection fuse (7.2.6 Input Protection Fuse) has been implemented to disconnect the Regulator from the Solar Panel Array if a short circuit develops inside an input capacitor.


One risk mitigation strategy is to connect two capacitors in series. This halves the risk, but has the following drawbacks:


  • ESR of capacitor string is doubled.
  • Voltage rating of each capacitor must remain same as if one capacitor was used (e.g. half the voltage rating should not be used), since should a single capacitor short-circuit, the remaining one will experience full voltage potential across the remaining device. In addition, voltage balancing resistors of high resistance may be used to divide voltage between capacitors equally.
  • Capacitance of capacitor string is halved compared to capacitance of the individual capacitors.
  • In order to have a collection of capacitors equal to an individual one in terms of capacitance, ESR, and voltage rating, four capacitors need to be placed in a series-parallel configuration (see Figure 9.1: Capacitors Series-Parallel Connection).

[[Image:|thumb|Figure 9.1: Capacitors Series-Parallel Connection]]


An additional reason for voltage-balancing resistor is that certain capacitor materials show a decrease in capacitance proportional to magnitude of applied voltage across the capacitor. This de-rating of capacitance can be significant for some dielectric materials.


Amount of capacitance from datasheet. Input aluminum capacitor.


Output Capacitance

Webench chose capacitor voltage rating of 16V for an output voltage of 12V. A good design margin is a capacitor voltage rating of 1.5 times the maximum node voltage. Nearest standard ratings are 20V and 25V.


A common design strategy is to place several capacitors in parallel for reduction in overall ESR. As test results show an unacceptably large output ripple (see 8.5.7 Output Voltage Ripple), much larger capacitance and much lower ESR is required at the output of the Regulator.


Test results also show transients with frequencies of 104kHz, 208kHz, and 150MHz. Several types of capacitor materials are needed to filter out the different frequency ranges. Ceramic capacitors are better suited for higher frequencies.


As an investigation, four 3.3μF, 25V ceramic (part number? material?) capacitors were added in parallel at the output (Figure 9.2: COUT Ceramic Capacitors in Parallel).


[[Image:|thumb|Figure 9.2: COUT Ceramic Capacitors in Parallel]]


Output voltage has improved significantly. Below is measurement of highest magnitudes (1.1V) of observable transients:


[[Image:|thumb|Figure 9.3: VOUT Transients, Four Additional Ceramic Capacitors]]


Output voltage ripple has also improved significantly, down to 150mV:


[[Image:|thumb|Figure 9.4: VOUT Ripple, Four Additional Ceramic Capacitors]]


High-frequency ringing has decreased in magnitude:


[[Image:]]


However, an absorbing or recirculating snubber (see 9.2 Snubber) should be added to the output to remove this ringing.


Peak capacitor current is ΔiL/2 = 1.44 A, and rms capacitor current for the triangular waveform 1.44/ sqrt(3) = 0.83 A.

MOSFET, Active Switch

A new choice for a MOSFET would need to satisfy the following criteria:

  • Device must have a rating of VDSmax ≥ 60V due to the input voltage maximum specification of 52V. A 80-100V device is recommended.
  • VGS(ON): based on empirical data, IC controller supplies a control VGS of ~7V. MOSFET should be ON fully at this gate voltage. MOSFET will cause power loss due to RDS(ON) presented by the transistor at this gate voltage.
  • RDS(ON) should be as little as possible, without excessive input capacitance typical of massively parallel devices.
  • Gate charge (capacitance). Total gate charge is limited by the current that the IC controller output drivers can supply at the necessary transition speed. In addition, power lost driving MOSFET gates will subtract from circuit efficiency and cause higher IC temperature.
  • ID: needs to be rated for at least the IL(RMS). Recommend device to be rated for IL(MAX). See section 7.2.5 Inductor.
  • PD is determined by losses of the MOSFET. Factors contributing to loss are: RDS(ON) static dissipation when device is fully ON at the driven gate voltage, losses due to MOSFET not being fully ON during switching transitions, and energy needed to drive gate total charge.

MOSET, Synchronous Rectification

Criteria for synchronous rectification MOSFET is same as for 9.6 MOSFET, Active Switch, with the following differences:


  • ID(RMS) = IL(RMS), but recommended device ID should be equal or exceeding IL(MAX).
  • PD: MOSFET is ON for the amount of time less the adaptive dead time (see IC controller datasheet). During the dead time, parallel free-wheeling diode D3 conducts instead due to its lower Schottky VF of ~0.3V.

MOSFET Gate Protection Resistors

MOSFET Gate Protection Resistors may be used in circuit to serve four functions:

  • They will limit current drawn by MOSFET gate from IC controller during fast charge / discharge of the gate capacitor. Note that excessive slowing down of MOSFET switch speed will result in power loss to internal dissipation, and increase likelihood of shoot-thru.
  • In the event of MOSFET gate dielectric punch-thru failure, they will limit current entering IC controller output from the shorted Drain-Source channel. Note that the controller already has a low-value built-in resistance at its outputs.
  • They will limit current flowing from IC controller output to provisional MOSFET Gate Protection Zeners (see 9.9 MOSFET Gate Protection Zeners).
  • They can be used as current shunts for oscilloscope voltage measurements of dynamic current supplied from IC controller into MOSFET gate terminal.

MOSFET Gate Protection Zeners

This is a provisional protection device. Its necessity will be evaluated after the test phase of this project.


Sense Resistor Re-Design

Sense resistor chosen by Webench is not fitting its land (see Figure 9.5: Rsense Too Small For Its Land), and a larger component is required for re-design.


[[Image:|thumb|Figure 9.5: Rsense Too Small For Its Land]]


In addition, Webench has suggested a wrong current limit value (see 8.5.14 Current Overload / Short-Circuit Behavior). For project specification of 15A current limit, a 7mΩ resistor is required.


Inductor Re-Design

Three findings are cause for inductor re-design:


  1. Webench uses a guideline of IL(max) = 0.4 * IO
  2. Currently specified inductor enters a -10% decrease of inductance at circuit IL(max) of 12.05A (see Table 7.1: Inductor, Webench)
  3. Large current ripple will require a larger output capacitor (or capacitors bank), and more importantly will result in shorter capacitor life span.

For three reasons above, re-design will use an inductor with the following specifications:

TODO ADD

Conclusion

On a very short timetable and a small budget, a DC-DC regulator was designed, sourced, assembled, and tested. Instances where theoretical predictions differed from practical measurements required minor circuit re-design.


Once Digi-Key selection tool has narrowed down controller IC choices, Texas Instruments Webench was very useful for initial circuit design, and has saved designer from laborious calculations and design choices.


Circuit total BOM was within available budget.


Circuit assembly was mostly straightforward, although there are some errors with Webench BOM.


PCB testing was mostly successful, with some exceptions of performance from Webench claims.


Circuit failed performance specifications for input and output ripple voltage, due to inadequate filtering capacitance. The practical aspect of capacitor ESR was cause of difference from theory to practice.


Output current limiting threshold, and physical size of current sense resistor was the other major design flaw.


With exception of issues outlined above, this designed and assembled DC-DC regulator performs in converting 48V±10% into a 12V, 10A output, with an ≈95% efficiency.


Circuit sourcing, construction, and testing has revealed important practical and real-life electronics concepts and behaviors. Difference from simplified theoretical discussion to practical design aspects is the experience gained as a result of real-life construction and testing.




References

[1] LM5116 Wide Range Synchronous Buck Controller. Datasheet. Texas Instruments. Revision G.


[2] D. W. Hart, “Power Electronics”. McGraw-Hill, 2011


Texas Instruments (TI) Webench

Appendix A – Bill of Materials

Table 12.1: BOM at Beginning of Project shows expenditures at beginning of this project:


[[Image:|thumb|Table 12.1: BOM at Beginning of Project]]

Appendix B – Labor

Labor required by this project is documented below in Table 13.1: Project Labor:


Labor Type
Amount, in Hours
Initial design and sourcing
16
PCB assembly
8
Test setup and harness build
4
Full-load testing
4
Documentation total to date
30
Total:
48

Table 13.1: Project Labor




Appendix D – List of Document Attachments

The major circuit components will have printed datasheets attached at the end of this report.


Number
Title
Category
1
MOSFET, Switch
Datasheet
2
MOSFET, Rectifier
Datasheet
3
Inductor
Datasheet
4
Capacitor, Output Filtering
Datasheet
Capacitor, Input Filtering
Datasheet
5
LM5116 Wide Range Synchronous Buck Controller
Datasheet
6
Diode, free-wheeling
Datasheet