Lattice Semiconductor MachXO2 Tutorial

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I have chosen the Lattice Semiconductor MachXO2 device for our PLD tutorial.


Specific reasons why this device was chosen. Refer to my table of all low-cost PLDs available: Programmable Logic Devices


This is why I settled on the MachXO2:

  1. I chose against showing PLDs of the simplest type (PAL, GAL, SPLD) because almost noone currently makes them.
  2. I chose against CPLDs to settle for the more sophisticated FPGAs, especially for their embedded microcontrollers (more on this later)


I settled on the MachXO2 because:

  1. It is low-cost and small-size
  2. The Diamond IDE is free for this device
  3. There is an 8-bit microcontroller available for this tiny device
  4. The basic development board (Pico) is low cost. However, I recommend purchasing the Control board instead and to not to try saving money
  5. There are examples in the C language available. Not only is this the only standard language, but only languages based on C syntax are relevant for electronics
  6. The company is innovative, and have caught my eye with their various novel concepts


Let's start. I have created a compressed archive of many useful files that you can download all in one shot: [1] [2.26GB]. This large file contains everything you need, including the Diamond IDE.


You will also need a development board. I recommend the control board after having purchased the Pico board, and finding it to be rather limited and generally cheapo. For example, it is smaller than what the pictures show. The liquid crystal display is tiny as well. Capabilities of this board are generally limited. For example, there are no indication LEDs available which you can toggle from the device. Nevertheless, at $30, this is an extremely affordable way to start learning FPGAs.


Tutorial:




doc how to implement from scratch in an XO2 device, both in software and in FPGA: read buttons (capacitive and normal), toggle output, write to LCD (dot matrix and liquid crystal), how to implement C statements, how to implement logic gates, how to input design as a schematic capture.