Switch bounce illustrated
Here is an illustration of switch bounce:
Notice the small scope timebase: 0.0005s per division. However, a digital logic input will trigger at the ups and downs of the switch output as contacts are settling. This is a very common scenario, and every logic or digital circuit with switch inputs must use de-bouncing.
A question for the readers: what does the non-vertical shape of the downward-going voltage represent? Why is it not vertical like the rising edge is? What shape is it? Is it diagonal or some other shape?
Answer: NO CHEATING! THINK ABOUT IT FIRST! OK, here is the answer. The shape is, of course, the classical RC discharge plot. Where is the capacitor? It is the very small capacitance of the scope probe! I did not load the circuit with a resistor to kill this parasitic capacitance because this actually replicates the typical capacitance of wires and board traces if the logic input is a very high impedance.